The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a semiconductor device fabricating method which has improved polishing selectivity and Within Wafer Non-Uniformity (WIWNU) over a target surface by applying chemical mechanical polishing (CMP) slurry with excellent polishing characteristic and polishing efficiency in a polishing process.
A CMP process is essential to a planarization process among semiconductor device fabricating processes and it is performed by introducing a liquid-phase slurry between a top surface of a wafer and a rotating elastic pad, chemically removing target materials, and mechanically removing the surface of the wafer by using an ultra-fine abrasive.
CMP processes currently used in the semiconductor device fabricating processes may be classified into an interlayer deposition (ILD) CMP process, a shallow trench isolation (STI) CMP process, a plug poly isolation CMP process, and a storage node isolation CMP process, and a metal CMP process.
In particular, the reliability and economical efficiency of the semiconductor device in the CMP process on heterogeneous layers can be improved by increasing a polishing rate with respect to the target surface in terms of polishing efficiency.
For example, in the case of an STI CMP process, CMP slurry commonly used does not have a sufficiently high polishing selectivity to an oxide layer compared with a nitride layer, and thus, the nitride layer is formed as a thick layer in order to obtain a flat oxide layer with a uniform thickness. To solve those limitations, a CMP process is performed by using a slurry with a higher polishing selectivity to an oxide layer than a nitride layer.
In addition, according to a conventional CMP technology, since a central part of a wafer is apt to be more polished than an edge part thereof, the wafer has an overall U-shaped or W-shaped global longitudinal section. In order to solve such a global planarization problem, a process margin for the nitride layer in the actual STI process is set large to ensure a stable polishing completion time point, but it serves as a waste of the process.
Therefore, it is desirable to use a slurry that has such an excellent polishing characteristic as to improve a global planarization of a wafer in the CMP process.
Furthermore, a physical friction between an abrasive or polishing pad and a wafer during the CMP process may cause scratches on the target surface. Thus, the scratches of the target surface in the CMP process are desired to be minimized in order to ensure the reliability of the device.
As such, in case where a heterogeneous layer is revealed by the CMP process, it is required to use a slurry that has a high polishing rate with respect to the target surface, an anti-scratch characteristic, and a polishing characteristic capable of improving a global planarization.